Hi, my name is

Youssef.

I am trying to make AI safer for life on earth.

Final-year Computer and Systems Engineering student with strong Python and C/C++ skills and passion for information & probability theories as lenses for learning about the world.

Actively seeking AI Safety opportunities to decrease catastrophic risks from ASI & AGI.

Youssef Okeil profile image

About Me

Youssef Okeil profile picture

I am an AI engineer with deep passion for AI safety for the last 4 years. Through independent study and coursework I learnt to be able to work with and analyze frontier models.

I am using those skills in developing a product to absorb the second-hand scene in Egypt and the Middle East, I am also working on a verification-acceleration project with Siemens as my graduation project.

Seeking AI Safety opportunities to learn about interpretability & scheming models.

Here are a few technologies I've been working with recently:
  • PyTorch
  • Stable-Baseline-3
  • python
  • FastAI
  • Linux
  • PostgreSQL
  • Docker
  • Supabase
  • Hugging Face
  • FairML
  • SHAP
  • LIME
  • Anthropic’s Circuit Tracer
  • GitHub Workflows

Experience

Graduation Project Researcher - Siemens
September 2025 - Present

Developing an ML pipeline to accelerate functional coverage in hardware verification, combining Reinforcement Learning and LLMs to guide SystemVerilog test generation.

Integrating Python-based ML models with a C/SystemVerilog simulation environment via DPI-C, gaining direct experience calling compiled C code from Python and vice versa.

Structuring the project as a clean, modular Python library with well-defined interfaces, argument parsing, and reproducible experiment configuration.

Tech Stack: Python, C/C++, DPI-C, RAGs, LLMs, Reinforcement Learning, SystemVerilog, PyTorch

Co-Founder & Lead AI Engineer - BadeelMarketplace
March 2025 - Present

Building a full-stack application to digitize second-hand stores, with a React frontend and a Python backend integrating the Gemini LLM API, ISBN Detection for automated product tagging and natural language descriptions.

Releasing software intended for real end-users, requiring robust CLI tooling, packaging, and API design.

Tech Stack: Python, React, JavaScript, Gemini API, REST APIs, Supabase, AWS, Docker.

Computer Vision Intern - Talentino AI
July 2024 - October 2024

Worked extensively in image processing, computer vision and computational intelligence applications.

Applied multiple deep learning techniques including CNN, LSTM, Attention Models, and Sentiment Analysis.

Implemented Style Transfer algorithms and advanced computer vision methodologies.

Tech Stack: Python, PyTorch, CNN, LSTMs, OpenCV, YOLO

AI Safety Governance Fellow - BlueDot Impact, UK
Jan 2025 - May 2025
Non-technical policy course covering AI safety risks, regulation, and international frameworks; built foundational awareness of multi-agent and strategic interaction contexts.
AI Safety Governance Fellow - AI Safety, Hungary
Aug 2024 - Jan 2025
covering AI governance policy frameworks, agent rationality literature, cooperative AI and study of game-theoretic concepts.

Education

2021 - 2026
Bachelor of Science in Computer & Systems Engineering
Ain Shams University
GPA: 3.33 out of 4.0
Key Modules: Machine Learning, Deep Learning, Mathematical Optimization (Linear Programming, Simplex Method), Operating Systems, Database Systems, Data Structures & Algorithms, Computer Networks, Software Engineering, Computer Architecture, Embedded Systems
High School
Egyptian Language School
GPA: 92% (High Honours)

Projects

ARENA 3.0 - Mechanistic Interpretability & AI Safety
Python PyTorch TransformerLens HuggingFace
ARENA 3.0 - Mechanistic Interpretability & AI Safety
Implemented core ML and AI safety concepts from scratch following the ARENA 3.0 curriculum, covering information theory, transformer architectures, and mechanistic interpretability techniques including activation patching and circuit analysis. We also implemented Resnet-34, GPT-2 & VAEs from scratch.
BERT Hiring Model - Bias Detection and Mitigation
Python BERT SHAP FairML PyTorch
BERT Hiring Model - Bias Detection and Mitigation
Trained BERT classifier with intentionally imbalanced data; developed counterfactual augmentation pipeline to detect and mitigate gender bias in automated hiring decisions.
Style Transfer Implementation
Python PyTorch VGG-19 CNN
Style Transfer Implementation
Reimplemented neural style transfer from the Gatys et al. paper using a 19-layer VGG Network, demonstrating ability to translate a mathematical algorithm from academic literature into clean, working Python code.
Shoplifting Detection using Computer Vision
Python PyTorch LSTM ViT OpenCV
Shoplifting Detection using Computer Vision
Built end-to-end video analysis pipeline using LSTM and Visual Transformer (ViT) for real-time anomaly detection; structured as a callable Python module with a clear API.
Quoridor Game Implementation
Pathfinding Algorithms AI Difficulty QT-Sim for GUI
Quoridor Game Implementation
Develop a fully functional implementation of the board game Quoridor, featuring a graphical user interface (GUI), AI opponents of varying difficulty, and professional documentation.
Reinforcement Learning - Q-Learning & PPO
Python PyTorch Stable-Baselines3 Gymnasium HuggingFace
Reinforcement Learning - Q-Learning & PPO
Trained and deployed Q-Learning agents on FrozenLake and Taxi-v3, and PPO agents on LunarLander and Huggy, publishing model weights and evaluation results to Hugging Face.
CPU Scheduler Simulator
C++ Qt Operating Systems
CPU Scheduler Simulator
Built a GUI-based desktop application in C++ and Qt that simulates FCFS, SJF, Priority, and Round Robin CPU scheduling algorithms in real-time. Features a live Gantt chart, dynamic process addition during runtime, and real-time calculation of waiting and turnaround times. We used only one algorithm for all scheduling algorithms, the trick was changing the comparison algorithm whether to; priority, remaining time, etc. This was an original idea by me.
MIPS Single-Cycle Processor
Verilog Computer Architecture MIPS
MIPS Single-Cycle Processor
Designed and implemented a fully functional MIPS single-cycle processor in Verilog, building each hardware component from scratch including the ALU, control unit, register file, instruction and data memory, program counter, and sign extension unit. Verified correctness via a testbench.

Get in Touch

My inbox is always open. Whether you have a question or just want to say hi, I’ll try my best to get back to you!